NRZI has memory and therefore we expect that it can be represented by a state diagram and trellis. The memory can be looked upon in two ways: it occurs in the mapping from b k to d k or from b k to the modulator output ± V . Define a state set for both ways of looking at the memory and draw a state dia- gram. Label the transitions with the input bit, b k , and the corresponding output quantity, either d k or voltage level ± V . Now draw a trellis corresponding to the above state diagrams. Start at t = 0 and assume that before t = 0 either b k = 0 or the voltage level is − V volts (the initial condition). Note you do not really need to draw two trellises, one trellis with clear labeling should suffice. Now assume that the sampled output sequence, { r k }, is that of Problem 6.2(d). Assume that the source bits are equally likely and that V 2 T b = E b = 1 joule. Use the signal space diagram of the NRZ-L modulator and the trellis of (b) to sequence demodulate using the Viterbi algorithm. Note that we can demodu- late in two ways: either first demodulate to the differential bits and then pass them through the differential decoder to obtain the sequence { b ˆ k }, or demodulate directly to the sequence { b ˆ k }. Now assume that the sampled output sequence, { r k }, is that of Problem 6.2(d) where a polarity reversal takes place at t = 4 T b . Repeat (c).